The invention relates to wafer probe assemblies and methods for reducing "scrubbing" of wafer probe needle tips on bonding pads of an integrated circuit device under test (DUT), and especially to improvements therein which avoid "interference" between probe needles to thereby facilitate simultaneous probing of multiple die on the same semiconductor wafer to thereby reduce the number of "touch downs" of the probe needles required to probe test the entire semiconductor wafer.
U.S. Pat. Nos. 5,521,518 (Higgins), 5,589,781 (Higgins et al.), 5,416,429 (McQuade et al.), 4,554,506 (Faure et al.), 4,843,315 (Bayer et al.), 5,534,784 (Lum et al.) and 4,636,722 (Ardezzone) are generally indicative of the state of the art. It is known that insulative aluminum oxide is usually present on aluminum bonding pads of integrated circuit wafers. It also is known that there may be hundreds of integrated circuit die on a single semiconductor wafer and that it is necessary to "probe test" each die or device under test (DUT) before the wafer is cut into individual integrated circuit die. The die testing often needs to be performed at high speed or high frequency, for example at a 100 MHz data rate, or even much higher.
The above references disclose various known techniques for supporting "probe cards" that support a plurality of probe needles, tips of which must provide reliable electrical contact (i.e., low probe needle contact resistance) with the bonding pads of the DUT during the testing. The shank of a probe needle is typically 5 to 10 mils in diameter. In a typical probe test system, a "test head" supports an "interface assembly", that supports a "probe card" from which all of the probe needles required to probe test a particular semiconductor die extend. Typically, the wafer is supported on a "wafer chuck". After alignment of the probe needles with the corresponding bonding pads of the integrated circuit die has been accomplished, the wafer chuck is raised approximately 3 mils so that the typically inclined probe needles "scrub" through brittle insulative aluminum oxide on the aluminum bonding pads to allow good mechanical and electrical contact of the needle tip with the bonding pad metal and thereby ensure low probe contact resistance. (Alternatively, the wafer chuck can be stationary and the test head can be moved). In any case, the probe needles each need to apply at least approximately 3-15 grams of force against the bonding pad surfaces. That is, reliable probe needle contact to the bonding pad may require the tip of each needle to contact the aluminum bonding pad with a force in the range of 3-15 grams to effectively accomplish the necessary scrubbing. Such scrubbing may involve "scratching" the bonding pad surface through a distance of roughly 0.5 to 1.5 mils while maintaining the 3-15 gram force on the probe needle in order to achieve reliable low resistance electrical contact between the probe needle and the aluminum metal of the bonding pad.
We have found that if the tip of the probe needle does not "scrub" the bonding pad surface to scratch through the aluminum oxide coating, a needle force of roughly 20 grams against the bonding pad is required to achieve low probe contact resistance.
FIG. 6 shows a typical prior art cantilevered probe needle 14 that is inclined relative to the surface of aluminum bonding pad 62. Wafer 20 is supported on wafer chuck 54, which is raised as indicated by arrow 22 through a distance of approximately 3 mils to achieve contact of the needle tip with bonding pad 62. Probe needle 14 is sufficiently elastic or "compliant" to compensate for planarity (non-flatness) of the surface of semiconductor 20 and yet allow probe needle 14 to maintain the 3-15 gram force as it slides along and thereby scrubs aside the insulative aluminum oxide on the surface of aluminum bonding pad 62. The "scrub distance" is indicated by numeral 63, and typically is roughly 0.5 to 1.5 mils for many state-of-the-art wafer probe test systems.
FIG. 7 illustrates several common configurations of bonding pads on various types of semiconductor die 20, identified herein as "type I", "type II", or "type III". The bonding pads 62 usually are in the range of roughly 2-4 mils square, with pitch (center-to-center spacing) in the range of 4 to 10 mils. In a typical memory die, a single column (or row) of bonding pads 62 may be provided as shown, so as to "bisect" the die 20. This bonding pad arrangement is most suitable for "multi-DUT wafer probing", wherein a single "touch down" of probe needles on corresponding bonding pads results in testing of multiple DUTs (die) on the wafer being probe tested. "Type II" bonding pad layouts can include opposed parallel columns of bonding pads located along opposite edges of each chip, in which case multi-DUT wafer probing can be achieved by contacting bonding pads 62-1 on die 20 and the adjacent column of bonding pads 62-2 on die 21. Alternatively, a type II bonding pad arrangement can include two closely spaced columns of bonding pads 62-1 and 62-2 centered on die 20. Type III bonding pad layouts, in which bonding pads 62 are positioned along all four edges of the die, are least well suited to multi-DUT testing.
It would be highly desirable to reduce the number of times the probe needles of a test head need to contact bonding pads of a particular semiconductor wafer in order to probe test the entire wafer. If only one probe card with probe needles to contact all of the bonding pads of a die is provided in a wafer probe test assembly, then the number of "touch downs" required is equal to the number of die on the wafer. However, if the number of "sets" of probe needles (one set being required to probe test one die) is increased in the probe test assembly so that multiple die are probe tested during each touch down, then the number of touch downs is reduced accordingly. The small size of typical integrated circuit die compared to the amount of space required to accommodate all of the prior art probe needles and allow "fan out" of conductors connected thereto has made multi-DUT testing very difficult and impractical. The same considerations have made it difficult to achieve balanced contact force (BCF) on all of the probe needles. Those skilled in the art know that balanced contact force (i.e., providing the same amount of force to urge every probe needle contact tip against a corresponding bonding pad on the DUT) is necessary to prevent premature failure or shortened life of individual probe needles with excess force thereon.
One known technique of making a probe card is to provide a layer of copper or gold plated copper on one surface of a thin layer of polyimide insulator and to provide a pattern of nickel alloy strips on the other face of the polyimide layer. The nickel alloy strips extend beyond one edge of the polyimide layer and form the probe needles, as shown in the above mentioned Higgins and Higgins et al. patents. The portions of the nickel alloy strips on the surface of the polyimide layer coact with the copper plating to function as 50 ohm transmission lines. This permits very high frequency test signals to be reliably transmitted between the probe test system and the bonding pads of the DUT.
Prior art FIG. 8 hereof illustrates a known probe system referred to as the "Cobra" system, in which the upper ends of probe needles 14 are guided through a rigid layer 67 of insulating material, whereat the upper ends of the individual probe needles 14 are electrically connected to suitable conductors of an interface assembly that is connected to an electrical test system. Each of the needles 14 in FIG. 8 is curved as illustrated and the lower end passes through a corresponding clearance hole 70 in a lower rigid layer or template 68 of insulating material. The bottom ends of the needles 14 contact the bonding pads 62 of the wafer 20 being tested. Any "scrubbing" of the lower tips of probe needles 14 on the bonding pads 62 occurs as a result of looseness of the end 14A in the clearance holes 70.
Note that the term "scrubbing" as used herein refers to substantial sliding of a probe needle tip on a bonding pad, e.g., about 0.5 mils or more, and excludes "micro-scrubbing" in which there is some but much less than 0.5 mils of sliding, scratching, or rubbing of the probe needle tip on the bonding pad.
Some integrated circuits operate from a single very low power supply voltage, sometimes as low as 3 volts or even 2.5 volts. Consequently, small amounts of variation in the ground voltage provided by the probe test system can significantly and deleteriously influence probe test results. Such "ground bounce" noise can be reduced by connecting "ground bounce" capacitors to the ground conductors as close as possible to the ground probe needle. In prior art epoxy ring probe assemblies the ground supply conductor connected to the probe needle supplying a ground voltage to the DUT has been connected to a ground plane conductor on the printed circuit board of the assembly, and the power supply conductor connected to the probe needle supplying a power supply voltage to the DUT has been connected to a bypass capacitor connected to the ground plane on the printed circuit board. The substantial length of these two conductors has resulted in undesirable levels of ground noise and power supply noise being applied to the DUT during testing.
Most prior art wafer probe assemblies support the probe needles on an epoxy ring which is supported by a large printed circuit board. Such epoxy (or plastic) structures have large coefficients of thermal expansion and cause "errors" in the positions of probe needles as the ambient temperature varies. It would be desirable to eliminate this source of probe needle position error.
It would be desirable to provide a structurally simple probe assembly which avoids the need for "scrubbing" the tips of the probe needles against the bonding pads of the DUT to displace insulative aluminum oxide thereon, but nevertheless provide low probe contact resistance of the needle tips on the bonding pad. It also would be highly desirable to provide a probe assembly which is suitable for use in multi-DUT testing. It would be desirable to provide an improved semiconductor wafer probe apparatus and technique which economically provides low probe needle contact resistance, allows high frequency operation, and provides reduction of "ground bounce" and power supply noise.